1. Field of the Invention
The present invention relates to a transistor in a semiconductor device and method of fabricating the same, and more particularly, to a transistor in a semiconductor device and method of fabricating the same, in which gate oxide films of different thickness are formed in a high voltage device region and a low voltage device region.
2. Background of the Related Art
In general, the semiconductor device such as the transistor can be classified into a device driven by a high voltage and a device driven by a low voltage. For this reason, in a high voltage operating transistor and a low voltage operating transistor have, the thickness of the gate oxide film is different. A method of forming the gate oxide films having different thickness in the high voltage device region and the low voltage device region, respectively, will be described in short.
A first gate oxide film is first formed in a first thickness on the entire structure of the semiconductor substrate. After forming a photoresist pattern through which only the low voltage device region is opened, the first gate oxide film formed in the low voltage device region is removed. Next, the photoresist pattern is removed. A second gate oxide film is then formed in a second thickness on the entire structure. Thereby, a thick gate oxide film on which the first and second gate oxide films are stacked is formed in the high voltage device region and only the second gate oxide film is formed in the low voltage device region, so that the gate oxide film thinner than the gate oxide film formed in the high voltage device region is formed.
As in the above, as the thin gate oxide film is formed in the low voltage device region, the leakage current through the gate insulating film is significantly increased. Due to this, there are problems that the power consumption of the device is increased and reliability of the device is lowered. Accordingly, there is a physical limit in reducing the thickness of the gate oxide film.
Furthermore, in case of the transistor of a p type electrode, a dopant implanted into the gate is infiltrated into the gate insulating film or what is more into the channel region of the semiconductor substrate to change the threshold voltage of the transistor, in the course of implementing an annealing process in order to improve the film quality of the gate electrode and form a LDD (lightly doped drain) region and a source/drain region.
In case of a n type transistor, hot carriers that obtained energy higher than the energy barrier at the interface of the semiconductor substrate and the gate insulating film by the electric field are introduced into the gate insulating film while moving from the source to the drain. Due to this, there are problems that the electric characteristic of the transistor is varied and reliability of the device is degraded.
Accordingly, the present invention is contrived to substantially obviate one or more problems due to limitations and disadvantages of the related art, and an object of the present invention is to provide a transistor in a semiconductor device and method of fabricating the same, which can reduce an electrical thickness of a gate oxide film by an increase of the dielectric constant although a physical thickness of the gate oxide film is increased, prevent the leakage current and diffusion and infiltration of a dopant into a gate oxide film or the channel region and improve an electrical characteristic of the device by reducing the leakage current, in such a way that the gate oxide film is formed in a low voltage device region using a nitrification oxide film and a gate oxide film is formed in a high voltage device region using a stack structure of the nitrification oxide film/oxide film/nitrification oxide film.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a transistor in a semiconductor device according to an embodiment of the present invention is characterized in that it comprises a gate electrode formed in a given pattern in a low voltage device region and a high voltage device region on a semiconductor substrate, source/drain formed in the semiconductor substrate at both comers of the gate electrode, a first gate oxide film formed between the gate electrode and the semiconductor substrate in the low voltage device region and having a first nitrification oxide film, and a second gate oxide film formed between the gate electrode and the semiconductor substrate in the high voltage device region and having a stack structure of a second nitrification oxide film/oxide film/third nitrification oxide film.
In the above, the concentration of nitrogen in the first nitrification oxide film could be controlled to be 10xcx9c15% and the concentration of nitrogen in the second nitrification oxide film or the third nitrification oxide film could be controlled to be 0.1%xcx9c3%.
Meanwhile, a thickness of the first gate oxide film is 12xcx9c20 xc3x85 and a thickness of the second gate oxide film is 35xcx9c55 xc3x85.
A method of fabricating a transistor in a semiconductor device according to an embodiment of the present invention is characterized in that it comprises the steps of simultaneously growing a first nitrification oxide film on the entire structure of a semiconductor substrate in which a low voltage device region and a high voltage device region are defined and a first oxide film on the first nitrification oxide film, forming a second oxide film below the first nitrification oxide film, removing the first oxide film, the first nitrification oxide film and the second oxide film formed in the low voltage device region, simultaneously growing a second nitrification oxide film in the low voltage device region and a third oxide film on the second nitrification oxide film, and at the same time growing a third nitrification oxide film between the second oxide film and the semiconductor substrate in the high voltage device region, nitrifying the first oxide film of the high voltage device region to form a fourth nitrification oxide film formed along with the first nitrification oxide film and nitrifying the third oxide film of the low voltage device region to form a fifth nitrification oxide film formed along with the second nitrification oxide film, by means of a nitrification treatment process, forming a conductive material layer on the entire structure, forming a stack structure of the first gate oxide film consisting of a fifth nitrification oxide film and a gate in the low voltage device region and a stack structure of the second gate oxide film consisting of the third nitrification oxide film/second oxide film/fourth nitrification oxide film and a gate in the high voltage device region, by means of a patterning process, and forming an insulating spacer at the sidewalls of the gate and source/drain in the semiconductor substrate at the sidewall of the gate.
In the above, the firstxcx9cthird nitrification oxide films may be formed using a N2O gas or a NO gas. At this time, the process using the NO gas may be implemented at a temperature of 750xcx9c950xc2x0 C. while supplying N2 of 5xcx9c10 slm and the NO gas of 300xcx9c900 sccm.
The second oxide film may be formed using an O2 gas or a mixed gas of O2+H2.
The photoresist pattern formed in order to remove the first oxide film, the first nitrification oxide film and the second oxide film formed in the low voltage device region, is removed using an ozone water.
The nitrification treatment process is implemented using a remote plasma nitrification treatment process and may be implemented under N2 and He atmosphere at a plasma power of 100xcx9c700W, a pressure of 50xcx9c1000 mTorr and a temperature of 180xcx9c500xc2x0 C. for 20 secondsxcx9c5 minutes.
The concentration of nitrogen in the third nitrification oxide film or the fourth nitrification oxide film is 0.1%xcx9c3%. The concentration of nitrogen in the fifth nitrification oxide film is 10xcx9c15%.
In another aspect of the present invention, it is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.